Chip Industry Weekly: Data Center Transformation, Capacity Expansion, and Capital Wave
This week, the semiconductor industry saw significant progress in multiple areas, including data center architecture, capacity investment, memory technology, and capital operations.
Data Centers: More Efficient and Smarter AI Infrastructure
Experts from the University of California, Berkeley, pointed out that advances in AI do not necessarily require ever-larger data centers. As the capabilities of small open-source models continue to improve, many tasks can rely on fewer computing resources, energy, and water, and can even run on local hardware. This view offers a new direction for thinking in the data center industry.
To meet the high-speed interconnect demands of AI systems, an alliance of 19 companies within the Open Compute Project (OCP) announced a plan to promote the development of standardized silicon-photonics-ready infrastructure to support the large-scale deployment of AI systems.
Data center network architectures are also undergoing transformation, with optical interconnects playing an increasingly important role in connecting AI clusters. Driven by the push toward 1-megawatt racks, data center cooling, power supply, rack design, and 3D-IC packaging are all facing fundamental changes. In addition, the Center for Strategic and International Studies (CSIS) recommends tying data center incentives to measurable community benefits, prioritizing brownfield sites and existing industrial or federal lands, and locating new computing capacity near universities, national laboratories, and advanced manufacturing centers.
Co-packaged optics (CPO) technology is also on the rise. AI data centers use various means to improve performance and reduce power consumption, but as market demand grows rapidly, the transition of CPO from laboratory instruments to factory-scale automated test equipment (ATE) requires standardization support.
Capacity Investment: Accelerating Global Expansion
ASE's subsidiary Siliconware Precision Industries (SPIL) broke ground on an advanced packaging and testing facility in Douliu, Taiwan, with an investment of nearly $3.1 billion. The facility, covering 6 hectares, is expected to add CoWoS packaging capacity for AI chips, with initial production targeted for 2028 and creating more than 2,200 jobs once fully operational.
Lam Research announced that it will invest more than $3 billion over the next five years to expand its global R&D laboratory network, increasing experimental capabilities by more than 50% to accelerate innovation in the AI era.
Meanwhile, China's position in the semiconductor supply chain is rising rapidly. According to a forecast by Rhodium Group, China's mature chip capacity could approach nearly half of global output by 2030. Although access to advanced AI chips remains restricted, domestic equipment manufacturers continue to expand.
Deals and Collaborations: The Clash of Capital and Technology
In terms of talent development, Lam Research is partnering with NY Creates to train approximately 3,500 university students over the next five years, teaching semiconductor process integration knowledge using Lam Research's SEMulator3D virtual manufacturing software.Sony Semiconductor has reached an agreement with TSMC on its next-generation image sensor joint venture in Japan. Sony will contribute approximately 465 billion yen (about $2.9 billion) and hold a controlling stake, while TSMC will contribute approximately 282 billion yen (about $1.8 billion). The plant in Kumamoto is expected to begin mass production of smartphone image sensors in 2029 and is currently still awaiting regulatory approval.
Nvidia has proposed a new plan to mobilize $500 billion in third-party capital for AI infrastructure, drawing mixed reactions across the industry. Supporters believe this could extend the AI spending cycle, with external investors bearing most of the risk; skeptics, meanwhile, worry about GPU depreciation and are uncertain whether they can serve as long-term infrastructure assets.
In the field of quantum computing, Quantinuum has partnered with Oracle to accelerate the adoption of hybrid quantum computing on Oracle Cloud Infrastructure. Oracle customers can combine GPU and HPC services with Quantinuum's 98-qubit Helios quantum computer. In addition, Quanta has reached an agreement with Quantinuum to jointly develop hardware infrastructure for future quantum computers.
Storage Technology: Competition and Strategy
New data has emerged from the storage market. Counterpoint Research said that in the second quarter, enterprise SSDs accounted for 48% of global NAND flash bit shipments, compared with 26% in the same period last year. Meanwhile, YMTC (Yangtze Memory Technologies Co.) jumped to third place in NAND flash shipments with a 14% market share.
High Bandwidth Memory (HBM) has become a proving ground for 3D stacking testing, DFT, and reliability validation. Kearney noted that memory makers are intentionally limiting NAND investment, prioritizing higher-return HBM and DRAM instead, which extends the cycle of tight NAND supply.
Kioxia and SanDisk have released high-performance 2Tb QLC 3D flash memory using a CMOS directly bonded to array (CBA) architecture, which improves performance without requiring new NAND cell stacking. In addition, reports indicate that SK Hynix is restarting investment in its second NAND fab in Dalian, China, which could increase output by 50%.
Big Money: Positioning for the Future
Intel raised $20 billion through an expanded stock offering. Intel CEO Lip-Bu Tan said that with this additional capital, Intel will be better positioned to capture growth opportunities from advanced-node wafer manufacturing, advanced packaging, and enormous CPU demand.
Point2 Technology expanded its Series B funding round to a total of $136 million, with Arm participating, for its RF-based interconnect solutions targeting AI data center infrastructure.The South Korean government is setting up a semiconductor fund of approximately $3.5 billion targeting promising materials, components, equipment, and fabless companies, while also providing $3.5 billion in trade financing and a 10-year, $700 million program to support joint chip development, validation, and production for various semiconductor companies.
Frontier R&D
KAIST (Korea Advanced Institute of Science and Technology) has developed a "programmable dynamic memristive transistor," which could bring a breakthrough for new computing architectures.
Overall, this week's chip industry developments show data centers evolving toward greater efficiency and standardization, capacity investments blossoming across multiple locations worldwide, intensifying competition in the memory market, and massive capital paving the way for next-generation technologies.