Three-source perspective and TSO validation conclusion:
Reuters: Huawei this week unveiled an alternative approach centered on reducing the time signals take to travel within chips and larger computing systems, naming it the Tau Scaling Law. Its core technology, LogicFolding, is designed to organize logic, analog, and memory circuits in a stacked, more tightly connected structure.
WSJ: Huawei’s semiconductor chief, He Tingbo, said at a chip conference in Shanghai that Moore’s Law already has a “successor.” Huawei’s method is not to make things smaller, but to stack two layers of circuits upward so that signal paths are shorter.
DIGITIMES: The related report title indicates that Huawei’s Tau Law places glass substrates at the center of advanced packaging; however, the available text also makes clear that the page itself is mainly about Taiwan’s green energy industry, with the related item appearing only as a linked report.
TSO validation conclusion:
The three sources consistently confirm that Huawei has proposed or interpreted a chip concept called the Tau Scaling Law, or Tau Law, whose focus is not simply shrinking transistors, but improving chip capability through stacking, shorter signal paths, and system-level efficiency gains.
Because Source 3 provides only a related-item summary, whether glass substrates are the key center of this approach, and what specific technical details they involve, cannot be confirmed from the available sources.
Facts confirmed by all sources:
Huawei publicly introduced a new chip concept around the end of May 2026.
The concept is called the Tau Scaling Law / Tau Law.
Its direction is not solely continued transistor miniaturization.
The approach emphasizes advanced packaging, 3D stacking / layered structures, and improved performance and efficiency through shorter signal transmission paths.
LogicFolding is one of the core technical terms explicitly mentioned by Reuters.
Main differences or points of variation:
Naming differs: Reuters uses “Tau Scaling Law,” WSJ describes it as a “successor to Moore’s Law,” and the DIGITIMES summary uses “Tau Law.”
Technical emphasis differs: Reuters highlights LogicFolding and the stacked organization of logic, analog, and memory circuits; WSJ stresses “stacking two layers of circuits upward” and shortening signal distance; DIGITIMES mentions glass substrates in advanced packaging, but the page does not elaborate.
The extent of industry significance differs: Reuters and WSJ focus mainly on Huawei’s own plan, while the visible DIGITIMES information is insufficient to confirm its full commentary framework on the advanced packaging sector.
Background and analysis:
In the available sources, Huawei’s approach is described as an alternative to the traditional path of transistor miniaturization. The core logic is to shift part of performance improvement away from “smaller process nodes” and toward “shorter interconnects, higher integration, and stronger stacking” through packaging and system architecture optimization. Reuters specifically notes that LogicFolding stacks logic, analog, and memory circuits, meaning that chip design optimization is no longer limited to transistor-level improvements, but extends to circuit layout and packaging coordination. WSJ summarizes this as “building upward” rather than “making smaller,” showing that external interpretation has shifted from single-point process advances to system-level restructuring.
For the advanced packaging industry, all three sources point to one fact: Huawei’s public statement places advanced packaging not merely as an auxiliary manufacturing technology, but as a core enabler for improving computing power and efficiency. As for the glass substrates mentioned by DIGITIMES, the current sources only confirm that they are associated with the Tau Law-related report. They do not confirm whether glass substrates have already become a key material choice in Huawei’s scheme, or how the supply chain impact will unfold.
Three-source summary:
Reuters: Huawei proposed the Tau Scaling Law, whose core is to shorten signal paths and improve chip and system efficiency through LogicFolding and stacked structures.
WSJ: Huawei describes this direction as a “successor” to Moore’s Law, emphasizing stacking circuits upward rather than making them smaller.
DIGITIMES: The related item suggests an association between Huawei’s Tau Law and glass substrates and advanced packaging, but the details and context are incomplete in the available source.
Conclusion:
Taken together, the three sources confirm that Huawei is shifting the focus of chip competition from simple process-node shrinkage toward system-level optimization through advanced packaging, 3D stacking, and logic layering. As for the exact implementation of this technology path, especially whether glass substrates are a key component, the available sources provide only partial confirmation and do not allow further verification.