Top-three-source views and TSO verification result:
Reuters: This week, Huawei announced an alternative approach centered on reducing signal transmission time within chips and larger computing systems, naming it the Tau Scaling Law; its core technology, LogicFolding, is designed to organize logic, analog and memory circuits in stacked, tightly connected structures.
WSJ: Huawei semiconductor chief He Tingbo said at a chip conference in Shanghai that Moore’s Law has a “successor”; Huawei’s approach is not to keep making chips smaller, but to stack two layers of circuits upward so that signal paths are shorter.
DIGITIMES: Related headline information shows that Huawei’s Tau Law places glass substrates at the center of advanced packaging; however, the provided content also indicates that the page itself mainly covers Taiwan’s green energy industry, with the related item appearing only as an associated report.
TSO verification result:
The three sources consistently confirm that Huawei has proposed or interpreted a chip concept called Tau Scaling Law (or Tau Law), with the key idea being not simply to shrink transistors further, but to improve chip capabilities through stacking, shorter signal paths and higher system-level efficiency.
Because Source 3 provides only a related-item summary, it cannot be confirmed from the provided sources whether glass substrates are truly the key center of this route, or what the specific technical details are.
Facts jointly confirmed:
Huawei publicly introduced a new chip concept around the end of May 2026.
The concept is called Tau Scaling Law / Tau Law.
Its direction is not based solely on further transistor shrinking.
The route emphasizes advanced packaging, 3D stacking/laminated structures, and improving performance and efficiency by shortening signal transmission paths.
LogicFolding is one of the core technology names explicitly mentioned by Reuters.
Main differences or divergences:
Naming varies: Reuters uses “Tau Scaling Law,” the WSJ describes it as a “successor to Moore’s Law,” and the DIGITIMES summary writes “Tau Law.”
Technical emphasis differs: Reuters highlights LogicFolding and the stacked organization of logic, analog and memory circuits; the WSJ stresses stacking two layers of circuits and shortening signal distance; the DIGITIMES summary mentions glass substrates in advanced packaging, but the page itself does not elaborate.
The degree of industry-analysis detail differs: Reuters and the WSJ mainly focus on Huawei’s plan itself; the available DIGITIMES information is insufficient to confirm its full analytical framework for the advanced packaging industry.
Background and analysis:
In the provided sources, Huawei’s approach is described as an alternative to the traditional transistor-shrinking path. Its core logic is to shift part of performance gains from “smaller process nodes” to “shorter interconnects, higher integration and stronger stacking” through packaging and system-architecture optimization. Reuters specifically notes that LogicFolding stacks and organizes logic, analog and memory circuits, meaning chip design optimization extends beyond transistors to circuit layout and package-level coordination. The WSJ summarizes this as “building upward” rather than “continuing to shrink,” showing that outside observers already understand it as a system-level reconstruction rather than a single-process improvement.
For the advanced packaging sector, the three sources together point to one fact: Huawei’s public statement places advanced packaging not merely as an auxiliary manufacturing technique, but at the core of improving computing power and efficiency. As for the glass substrate mentioned by DIGITIMES, the available sources only confirm that it is associated with Tau Law-related coverage; they do not confirm whether it has already become a key material choice in Huawei’s approach, or how its impact on the supply chain will unfold.
Summary of the three-source views:
Reuters: Huawei proposed Tau Scaling Law, with the core idea of using LogicFolding and stacked structures to shorten signal paths and improve chip and system efficiency.
WSJ: Huawei describes this direction as a “successor” to Moore’s Law, emphasizing stacking circuits upward rather than making them smaller.
DIGITIMES: The related item suggests an association between Huawei’s Tau Law and glass substrates as well as advanced packaging, but the details and context are incomplete in the provided source.
Conclusion:
Taken together, the three sources confirm that Huawei is shifting the focus of chip competition from simple process shrinking to system-level optimization through advanced packaging, 3D stacking and logic partitioning. As for the specific implementation of this technology route, especially whether glass substrates are a key element, the provided sources only partially support the claim and cannot confirm it further.